Performance analysis and optimization of 10 nm TG N- and P-channel SOI FinFETs for circuit applications

This paper analyses the electrical characteristics of 10 nm tri-gate (TG) N- and P-channel silicon-on-insulator (SOI) FinFETs with hafnium oxide gate dielectric. The analysis has been performed through simulations by using Silvaco ATLAS TCAD Bohm quantum potential (BQP) algorithm. influence geometrical parameters on threshold voltage VTH, subthreshold swing (SS), transconductance on/off current ratio, ION/IOFF, is investigated. two structures have optimized for CMOS inverter implementation. simulation results show that N-FinFET P-FinFET can reach a minimum SS value Fin heights 15 9 nm, respectively. In addition, low voltages 0.61 V 0.27 SOI FinFETs, respectively, are obtained at width 7 nm.